1. Field of the Invention
The present invention relates to systems and methods for processing video and graphics. In particular, the present invention relates to a system and methods that can process both video and graphics.
2. Description of the Background Art
The processing of video data and graphics data is often performed by a graphics processing unit added to a computer system. These graphic processing units are very efficient at manipulating and displaying computer graphics, and their highly-parallel structure makes them more effective than typical Central Processing Units (CPUs) for a range of complex algorithms that are computationally expensive. A graphics processing unit implements a number of graphics primitive operations in a way that makes running them much faster than drawing directly to the screen with the host CPU. The most common operations for early 2D computer graphics include the BitBLT operation, usually in special hardware called a “blitter”, and operations for drawing rectangles, triangles, circles and arcs. Originally, graphics processing units processed only graphics but increased capability have been added to allow them to process video data as well. More recent graphics processing units support 3D computer graphics and typically include digital video-related functions as well.
FIG. 1 illustrates a conventional prior art graphics processing system 100. The prior art system 100 includes several graphics engines 102, a video processing unit 104, a frame buffer 106 and a display processing unit 108. Such systems 100 typically include a first input port coupled to a signal line 120 to receive graphics data, a second input port coupled to signal line 122 to receive video data an output provided on signal line 124. The graphics engines 102 include multiple processing paths and units such as for processing legacy graphics data format, 2D graphics and 3D graphics. The graphic engines 102 are typically separate graphics engines, one for each type of graphics processing. The output of the graphics engines 102 is coupled to the frame buffer 106 to store pixel data. The video processing unit 104 is coupled to signal line 104 and is a conventional processor for manipulating video data and generating pixels. The output of the video processing unit 104 is coupled to the frame buffer 106 to store pixel data. The frame buffer 106 holds the graphics information for one frame or picture and consists of color values for every pixel (point that can be displayed) on the screen. The frame buffer 106 can also store off-screen data. The frame buffer 106 is coupled to the display processing unit 108 for providing pixel data. The display processing unit 108 in turn renders the pixels to create the video data output.
One problem in the prior art is performing both video processing and graphics processing. Each has different requirements that affect prioritization and arbitration of requests and processing. The typical prior art approach is to provide redundant logic for processing legacy graphics, 2D graphics, 3D graphics and video data thereby greatly increase the amount of area required for such an integrated circuit. Thus, such an approach greatly increases the die size and manufacturing costs.
Therefore, what is needed is an apparatus for processing both video and graphics that overcomes the limitations and problems of the prior art.